Senior / Principal ATE Test Engineer |Teradyne J750| USC |GC

Role: Principal ATE Test Engineer

We have a new need for 3 engineers to be working out of Boston. They would need to be working in office 3 days a week. We’re looking for someone with 15+ years of experience and having experience with J750 specifically. 

Key Responsibilities

* Develop ATE test packages for wafer probe, final production test, and product characterization of mixed-signal and power management products.
* Define test requirements, test concepts, test plans, and test methodologies.
* Collaborate with design engineers to implement Design-for-Test (DfT) features to improve quality while minimizing test cost.
* Develop test firmware, embedded test software, and data processing routines, including Built-In Self-Test (BIST) features.
* Design and develop test hardware and PCB load boards using EDA tools.
* Create and debug ATE test programs, convert ATPG patterns, integrate with tester hardware, and validate production test solutions.
* Support silicon characterization, qualification, and production release.
* Improve manufacturing efficiency by reducing test time, test cost, and increasing production quality through test optimization and platform transfers.

Required Qualifications
* Bachelor’s or Master’s degree in Electrical, Electronics, Physics, or Computer Engineering.
* Experience developing production test solutions for mixed-signal ICs using ATE.
* Strong knowledge of:
   * Analog and digital circuit design
   * Power devices
   * High-speed signal integrity
* PCB design experience using tools such as Cadence Allegro.
* Strong programming skills in:
   * C/C++
   * Visual Basic (VB)
   * Java
   * Embedded programming
   * LabVIEW
   * Scripting languages
* Experience with ATE platforms such as:
   * Teradyne J750
   * Advantest V93K
   * ETS systems
* Hands-on experience with laboratory equipment including oscilloscopes, signal generators, spectrum analyzers, and bench automation